Cadence Sponsors Industry Forums; Series Addresses Key Challenges Affecting the Design Chain
SAN JOSE, Calif.—(BUSINESS WIRE)—Nov. 10, 2004—
Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN)
today announced its sponsorship of Industry Forums, a series of panels
where leading experts from major semiconductor, foundry, equipment, IP
and EDA companies will engage each other on key issues and challenges
affecting the design chain. The first two forums will focus on
low-power design and advanced nanometer manufacturing challenges, each
a critical industry issue.
The first forum, "Making the Low-Power Design Chain a Reality,"
will be co-sponsored with the Fabless Semiconductor Association (FSA)
and held Nov. 11 at the 2004 FSA Suppliers Expo Taiwan. This forum
explores how advanced nanometer technology nodes and complex wireless
applications have made the impact of power consumption on design
performance a significant issue for designers. At 90 nanometers and
below, leakage current becomes a significant barrier to success. At
this panel, experts from semiconductor industry leaders such as
Cadence, Freescale, and TSMC will provide unique perspectives
regarding the business effects of power management and technical
approaches to address low-power design. Mike Clendenin of EE Times
will moderate the forum. For more information, please visit:
http://www.fsa.org./suppliers_expo/taiwan/forum.asp.
The second forum, "How Does the Design Chain Need to Reconfigure
Itself to Address the Manufacturing Challenges of the Nanometer Era?,"
will be held during the Cadence Partners Event on Dec. 2, 2004, in San
Jose. This forum considers how significantly increasing complexity has
severely hindered the ability to effectively develop, integrate, and
ramp new technology nodes, as experienced at 130 nanometers. Design
and photomask costs are skyrocketing and are dramatically affecting
the business model for lower-volume ASICs and SoCs. The disaggregated
design chain must invest in new, more integrated solutions, form
strategic alliances to increase collaboration, and reintegrate to
enable customer success at advanced processes. At this panel, business
experts from leading integrated device manufacturers (IDMs), EDA
vendors, lithography tool providers and pure-play foundries will
debate the industry structure required to address the challenges
affecting the design chain. Ken Rygler of Rygler and Associates, Inc.
will serve as moderator.
About Cadence
Cadence is the world's largest supplier of electronic design
technologies and engineering services. Cadence products and services
are used to accelerate and manage the design of semiconductors,
computer systems, networking equipment, telecommunications equipment,
consumer electronics, and other electronics based products. With
approximately 4,850 employees and 2003 revenues of approximately $1.1
billion, Cadence has sales offices, design centers, and research
facilities around the world. The company is headquartered in San Jose,
Calif., and trades on both the New York Stock Exchange and Nasdaq
under the symbol CDN. More information is available at
www.cadence.com.
Cadence and the Cadence logo are registered trademarks of Cadence
Design Systems, Inc. in the U.S. and other countries. All other
trademarks are the property of their respective owners.
Contact:
Cadence Design Systems, Inc.
Bruce Chan, 408-894-2961
chan@cadence.com
